At first glance, Helios and Vera Rubin NVL72 look remarkably alike. Each connects 72 accelerators as one scale-up computer, claims 260 TB/s of aggregate scale-up bandwidth, and uses a second fabric to join racks into a larger cluster. The comparison becomes useful one layer below those numbers.
AMD's published specifications give Helios more HBM capacity, slightly more per-GPU memory bandwidth, and more stated scale-out bandwidth. UALink and Ethernet also leave more of the implementation open to suppliers. NVIDIA's case rests on tight integration across accelerator silicon, fabrics, and software. The choice between a more modular stack and tighter vertical integration runs through the data below.
Same boundary72 accelerators, 260 TB/s scale-up
Helios emphasisHBM capacity, bandwidth, and open standards
Vera Rubin emphasisSoftware and platform integration
The same rack boundary, assembled differently
| Dimension | AMD Helios | NVIDIA Vera Rubin NVL72 | Deployment consequence |
|---|---|---|---|
| System model | AMD reference design implemented and supported by OEM, ODM, cloud, and hyperscale partners. | Third-generation MGX NVL72 rack design manufactured by a broad system-builder ecosystem. | In both cases, buyers must qualify the exact partner product, support contract, firmware, and lifecycle policy. |
| Primary workload range | Large-scale AI training, fine-tuning, and inference. | Pretraining, post-training, test-time scaling, and inference. | Both are general-purpose GPU racks rather than inference-only appliances. |
| Accelerators | 72 Instinct MI455X GPUs using CDNA 5. | 72 Rubin GPUs. | The matching accelerator count makes the rack boundary directly comparable. |
| Host processors | EPYC "Venice" CPUs using x86; AMD does not publish a rack-wide CPU count on its product page. | 36 Vera CPUs with 3,168 Arm-compatible Olympus cores in total. | CPU ISA, memory, and host integration can affect data preparation, control services, and application portability. |
| Mechanical design | Double-wide Meta Open Rack Wide design submitted to OCP. | MGX NVL72 design; NVIDIA describes MGX as open source, while NVLink and much of the platform stack remain NVIDIA-controlled. | Helios places more emphasis on open rack and fabric standards; Vera Rubin emphasizes tightly integrated platform continuity. |
| Cooling | Direct liquid cooling with a rack manifold and quick-disconnect compute and switch trays. | Liquid-cooled rack-scale system. | Neither belongs in a conventional air-cooled server deployment plan. |
Memory and networking pull in different directions
Networking spans several different jobs in these racks. Scale-up switches join the GPUs inside one rack. AI NICs and scale-out switches carry traffic between racks. DPUs handle front-end connectivity, storage, security, and management services. NVIDIA supplies each layer as part of its own platform. AMD supplies the Helios NICs and DPUs, while its open reference design leaves room for partner switch implementations.
| Dimension | AMD Helios | NVIDIA Vera Rubin NVL72 | Likely constraint |
|---|---|---|---|
| HBM4 per GPU | Up to 432 GB. | 288 GB. | Helios has 50% more stated accelerator memory per GPU. |
| HBM4 per rack | 31 TB. | 20.7 TB. | Helios has about 50% more stated accelerator-memory capacity for models, experts, long contexts, and key-value cache. |
| HBM bandwidth per GPU | 23.3 TB/s. | 22 TB/s. | Helios has about 6% more stated bandwidth per GPU. Usable application bandwidth still depends on the memory controller, software, and workload. |
| Scale-up technology | UALink over Ethernet across four scale-up cartridges. | NVLink 6 switches. | Helios uses an open-standard direction; Vera Rubin uses NVIDIA's mature, vertically integrated fabric and collective-software path. |
| Scale-up switch implementation | AMD identifies four UALink-over-Ethernet cartridges but does not name an AMD-branded switch ASIC. HPE's announced Helios implementation uses an HPE Juniper switch developed with Broadcom. | NVIDIA supplies the NVLink 6 switch layer. Preliminary DGX specifications list nine L1 NVLink switches per rack. | AMD separates the fabric standard from the switch supplier; NVIDIA owns the in-rack fabric from GPU links through switches. |
| Aggregate scale-up bandwidth | 260 TB/s, vendor specification. | 260 TB/s, preliminary vendor specification. | The headline is a tie. Topology, latency, collectives, congestion, and software determine usable application bandwidth. |
| Aggregate scale-out bandwidth | 43 TB/s bidirectional rack aggregate through Pensando Ethernet networking. | 28.8 TB/s bidirectional rack aggregate through ConnectX-9 with InfiniBand or Spectrum-X Ethernet paths. | AMD specifies roughly 49% more aggregate scale-out bandwidth. The totals count both directions and do not establish usable application throughput. |
| Scale-out network endpoints | Pensando Vulcano AI NICs with 800 Gb/s throughput, PCIe 6 and UALink interfaces, and UEC-ready RDMA. | ConnectX-9 SuperNICs with 800 Gb/s per port. NVIDIA specifies four per compute tray and 1.6 Tb/s of scale-out bandwidth per GPU. | The endpoint NICs participate in RDMA, traffic scheduling, and congestion control; their interaction with the switch fabric affects usable bandwidth. |
| Scale-out switch options | UEC-ready Ethernet. AMD's public Helios reference design does not name one required scale-out switch platform, so the OEM or hyperscaler implementation is part of the product to qualify. | Spectrum-6 switches with Spectrum-X Ethernet, or Quantum-X800 InfiniBand. | AMD emphasizes standards and supplier choice. NVIDIA offers a defined end-to-end fabric with its own NICs, switches, telemetry, and control software. |
| Infrastructure DPUs | Pensando Salina DPUs offload front-end networking, storage, and security services. | BlueField-4 DPUs use the Astra architecture to manage and secure ConnectX-9 network I/O. | These DPUs serve a different role from the GPU-facing scale-out NICs and should be evaluated for isolation, observability, and operations. |
Peak compute does not pick a winner
| Dimension | AMD Helios | NVIDIA Vera Rubin NVL72 | Limit of comparison |
|---|---|---|---|
| Low-precision headline | 2.9 EF FP4 and 1.4 EF FP8, based on AMD internal analysis using supported OCP and MX formats. | 3.6 EF NVFP4 inference, 2.52 EF NVFP4 training, and 1.26 EF FP8/FP6 training; NVIDIA labels the values preliminary and subject to change. | Do not rank the racks from these figures. Formats, dense or sparse treatment, accuracy behavior, and workload mapping differ. |
| Public application comparison | No reproducible Helios result against Vera Rubin. | No reproducible Vera Rubin result against Helios. | The same model, output quality, sequence mix, concurrency, software versions, latency objective, and wall power are required. |
| Vendor efficiency claims | AMD promotes favorable capacity, openness, and total-cost potential without a complete public Helios methodology. | NVIDIA publishes large gains over its own Grace Blackwell generation on selected workloads, marked as projected and subject to change. | Generational vendor comparisons help explain design intent; they do not establish cross-vendor economics. |
The software decision may dominate
| Dimension | AMD Helios | NVIDIA Vera Rubin NVL72 | Operational consequence |
|---|---|---|---|
| Linux foundation | ROCm supports Ubuntu, Red Hat Enterprise Linux, SUSE Linux Enterprise Server, Debian, Rocky Linux, and Oracle Linux on qualified hardware. | BaseOS supports Ubuntu, Red Hat Enterprise Linux, and Rocky Linux; DGX OS is an Ubuntu-based integrated distribution. | Both are Linux-hosted platforms, but the final qualified image depends on the system builder or cloud operator. |
| Core software | ROCm, RCCL, framework integrations, vLLM, SGLang, Triton, and related open-source tools. | CUDA, NCCL, TensorRT-LLM, NIXL, Dynamo, and NGC software. | NVIDIA has the deeper established ecosystem; AMD offers broader hardware and standards choice but may require more qualification and tuning. |
| Kubernetes path | AMD GPU Operator manages drivers, device discovery, metrics, health checks, and node remediation. | Dynamo provides a Kubernetes-native distributed inference path alongside NVIDIA's GPU and network operators. | Feature presence is not enough; operators need a supported version matrix and tested upgrade and failure procedures. |
| Software portability | Common frameworks are supported, but optimized model paths and rack-scale tooling remain less proven. | Broad installed CUDA base and mature optimization tools, with greater dependence on NVIDIA APIs and libraries. | Helios may reduce hardware lock-in; Vera Rubin may reduce initial integration work. |
| Supply-chain stage | AMD says shipments to customers begin in the second half of 2026; major partner commitments and development racks are public. | NVIDIA says the platform and partner supply chain are in full-production ramp, with shipments starting in fall 2026. | Both remain new systems. NVIDIA has disclosed a more advanced manufacturing ramp. |
What the product sheets leave open
| Dimension | AMD Helios | NVIDIA Vera Rubin NVL72 | Evidence needed |
|---|---|---|---|
| Final rack wall power | No comparable production configuration and measurement methodology published. | No comparable production configuration and measurement methodology published. | Measured idle, representative, sustained, and peak facility power for the quoted system. |
| Physical dimensions | Double-wide ORW is disclosed, but a final partner-specific footprint and service envelope can vary. | A directly comparable final footprint is not published on the product page. | Rack width, depth, service clearance, floor loading, coolant requirements, and allowable facility conditions. |
| Reported engineering-system weight | CNBC reported up to 7,000 pounds across configurable Helios designs. | CNBC described the inspected Vera Rubin system as roughly two tons. | Certified shipping and operating weights for the exact rack, including coolant and required support equipment. |
| Purchase price and support | No public final partner price or uniform service contract. | No public final partner price or uniform service contract. | Delivered system price, network and facility costs, software terms, spares, response times, and lifecycle commitments. |
| Reliability and repair | Modular serviceability is a design goal; public fleet data is not available. | Field-replaceable modular trays are demonstrated; public fleet data is not available. | Failure rates, degraded operation, blast radius, repair time, spare strategy, and rolling-upgrade behavior. |
| Independent performance | No public, reproducible production benchmark found. | No public, reproducible production benchmark against Helios found. | A controlled pilot using the buyer's models, quality checks, latency targets, sequence distribution, and concurrency. |
Where each rack makes its case
Helios is the more interesting starting point when memory capacity, open rack and fabric standards, x86 hosts, switch-supplier choice, or a credible second source are central to the deployment. Its architectural advantages come with an integration question: how much work will be required to turn a partner-built reference design and a younger software stack into a stable service?
Vera Rubin is easier to defend when an organization already depends on CUDA and values one supplier's NIC, DPU, switch, collective, and deployment tooling. That continuity can reduce initial integration work, although it also deepens dependence on NVIDIA's APIs, commercial terms, and upgrade path.
The public record establishes this architectural tradeoff, not a performance or cost winner. Final selection depends on workload benchmarks at realistic quality, latency, and concurrency targets, together with facility limits and vendor support terms. The companion reviews of AMD Helios and NVIDIA Vera Rubin NVL72 trace the technical evidence behind each platform.
Sources
- AMD Helios product page — architecture, fabrics, partner model, software, and preliminary compute specifications.
- AMD Instinct MI455X specifications — current per-GPU memory capacity, memory bandwidth, and accelerator specifications.
- AMD and HPE Helios networking announcement — HPE Juniper and Broadcom scale-up switch implementation.
- AMD and Microsoft deployment announcement — customer timing, intended workloads, and second-half 2026 shipment statement.
- NVIDIA Vera Rubin NVL72 product page — architecture, memory, fabrics, CPU configuration, and preliminary compute specifications.
- NVIDIA Rubin platform technical overview — ConnectX-9 endpoints, Spectrum-6 switching, congestion control, and scale-out topology.
- NVIDIA BlueField Astra technical overview — DPU control, isolation, and management of ConnectX-9 network I/O.
- NVIDIA DGX Vera Rubin NVL72 specifications — preliminary NIC, DPU, and NVLink switch configuration.
- NVIDIA Vera Rubin production announcement — partner manufacturing ramp and fall 2026 shipment statement.
- ROCm Linux requirements and AMD GPU Operator documentation — Linux and Kubernetes support paths.
- NVIDIA BaseOS documentation and NVIDIA Dynamo documentation — Linux distribution and distributed-inference paths.
- CNBC AMD Helios lab report and CNBC Vera Rubin lab report — reported physical-system observations and weight context.